In recent years, research has been carried out into utilizing a ΔΣ modulator that uses a multi-band pass filter in an RF receiver circuit of a communication system such as a mobile telephone or a wireless LAN (Local Area Network). This is because when a multi-band pass ΔΣ modulator is used, quantization noise inside an ADC (Analog Digital Converter) is reduced within the signal band, and it is possible to improve the precision of the digital output (this method is called “noise shaping”). A ΔΣ modulator has further advantages in that the analog circuit scale is small and it is possible to realize high-precision AD conversion in a low-precision device.
In this way, although ΔΣ modulators have been widely used in the past as a system that can realize a high-precision AD converter by means of high-speed oversampling and a noise shaping method and in particular as an audio AD converter, when a multibit ΔΣ modulator is used to achieve even higher precision, there is the problem that the nonlinearity of the DAC inside the modulator is not subjected to noise shaping. Because of this, there has been an inconvenience of deterioration in the overall precision of the ADC.
FIG. 34 is a block diagram that is useful in explaining the generation of noise due to the nonlinearity of a multibit DAC, where FIG. 34(a) is a block construction diagram and FIG. 34(b) shows an equivalent circuit.
As shown in FIG. 34(a), the inputted analog signal X(Z) is supplied to one input of a subtractor 100. The output of the subtractor 100 is supplied to an N-order multiple band filter 101 (whose transmission function is expressed as H(Z)) and only signal components within the band are extracted there and supplied to a multibit ADC 102. The multibit ADC 102 converts the inputted analog signal to a digital signal, but as shown in FIG. 34(b), quantization noise E(Z) is added with the AD conversion. This quantization noise decreases as the number of bits is increased. Accordingly, a multibit ADC has less quantization noise compared to a one-bit ADC.
The digital output Y(Z) produced by the AD conversion is supplied via a multibit DAC 103 to the other input of the subtracter 100. Inside the multibit DAC 103, δ noise is superimposed (see FIG. 34(b)). This δ noise is nonlinear noise that is characteristic to the multibit DAC 103 and is caused by variation in the elements, such as capacitors, that construct the DAC 103. The relationship between Y(Z) and X(Z) from the equivalent circuit shown in FIG. 34(b) is as shown in Equation (1).
                    Equation        ⁢                                                  ⁢                                                (        1        )                                                                      Y          ⁡                      (            Z            )                          =                                                            H                ⁡                                  (                  Z                  )                                                            1                +                                  H                  ⁡                                      (                    Z                    )                                                                        ⁢                          (                                                X                  ⁡                                      (                    Z                    )                                                  -                                  δ                  ⁡                                      (                    Z                    )                                                              )                                +                                    1                              1                +                                  H                  ⁡                                      (                    Z                    )                                                                        ·                          E              ⁡                              (                Z                )                                                                        (        1        )            
Nonlinear noise δ (Z) will now be described. FIG. 35 shows the digital-analog conversion characteristics of a one-bit DAC (shown by the straight line) compared to the digital-analog conversion characteristics of multibit conversion (shown by the broken line). As shown in FIG. 35, although nonlinear noise does not appear with a one-bit DAC, nonlinear noise is produced when a multibit DAC is used. This is due to errors caused by the nonlinearity of the elements that construct the multibit DAC.
One example construction of the multibit DAC 103 and the operation thereof are shown in FIG. 36. As shown in FIG. 36(a), the multibit DAC 103 includes eight capacitors C0 to C7, an operational amplifier (op amp) 104, a feedback capacitor Cs and switches S0 to S7. These capacitors C0 to C7 are obviously not all manufactured exactly the same and there are some fluctuations in the respective capacitance values. If the mismatches due to such fluctuation are expressed as e0, e1, . . . , e7 and the average value of C0 to C7 is expressed as C, it is possible to express as C0=C+e0, C1=C+e1, . . . , C7=C+e7.
When an input signal with a value that is one of 0 to 7 is supplied to the input, a corresponding number of capacitors are charged and the charged voltages are outputted via the feedback capacitor Cs that is connected to the inverting terminal of the op amp and the output terminal. Here, if the input signal is “m” (where m=3, for example), the switches S0, S1, and S2 in FIG. 36 are switched on and the capacitors C0, C1, and C2 are charged with the reference voltage Vref. The voltage that is charged in these capacitors is extracted via the feedback capacitor Cs as the output voltage Vout.
The output voltage Vout at this time is shown in Equation (2).
                    Equation        ⁢                                                  ⁢                                                (        2        )                                                            Vout        =                                            -              m                        ⁢                          C              Cs                        ⁢            Vref                    +          δ                                    (        2        )            
where δ=(e0+e1+ . . . +e7)Vref/Cs is the reference voltage supplied to the switches S0 to S7.
The nonlinear noise δ due to the use of the multibit DAC 103 is caused by fluctuations in the values of the capacitors C0 to C7 of the DAC 103, but this is because due to the characteristics of the multibit DAC, the capacitors C0, C1, . . . , C6, C7 are charged in that order regardless of the value of the input digital signal. That is, as shown in FIG. 36(b), when the values 4, 3, 2, 2, . . . are successively supplied as inputs, since the switches are switched on in the order S0 to S7 corresponding to the inputted number, there are many cases where the capacitors C0, C1, . . . , are always on, and the capacitors C7, C6, . . . , seldom become on.
To solve this problem, as shown in FIG. 37(a), a method has been taken in which the capacitors C0 to C7 are connected to form a ring. According to this method, when “4” is inputted first, the capacitors C0 to C3 are switched on. If “3” is inputted next, the capacitors C4 to C6 are switched on. By successively switching on the eight capacitors C0 to C7 in this way, it is possible to solve the problem described above. FIG. 37(b) is a diagram useful in explaining the operation of this DAC. This method has not reached actual use due to poor design efficiency, but it is already known in papers as a segmented DAC where current cells are arranged in a ring. (see Non-Patent Document 1).
Non-Patent Document 1: San Hao, Kobayashi, Kawakami, Wada “A Noise Shaping Algorithm for Multibit DAC Nonlinearities in Complex Band Pass ΔΣAD Modulators” (Proceedings of 16th Karuizawa Workshop on Circuits and Systems, pp 85 to 90)
Non-Patent Document 2: S. Bommalingaiahnapallya, R. Bommalingaiahnapallya, and R. Harjani “EXTENDED NOISE-SHAPING IN CASCADED N-TONE ΣΔCONVERTERS”, (Fifth International Conference on Advanced AD and DA Conversion, Techniques and Their Applications, Limerick Ireland (July 2005).)